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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-10-25 21:14:04 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-11-06 08:27:21 -0800 |
| commit | b701f195d3ed39429fab5787df7c6b1c9377ab94 (patch) | |
| tree | c19435be42564e1ad6d7ffe00283283d8fe7f3af /tcg/riscv | |
| parent | 0fbee2b76441db5452cde98148f600aba907f4f7 (diff) | |
| download | qemu-b701f195d3ed39429fab5787df7c6b1c9377ab94.zip qemu-b701f195d3ed39429fab5787df7c6b1c9377ab94.tar.gz qemu-b701f195d3ed39429fab5787df7c6b1c9377ab94.tar.bz2 | |
tcg: Remove TCG_TARGET_HAS_neg_{i32,i64}
The movcond opcode is now mandatory for backends to implement.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231026041404.1229328-7-richard.henderson@linaro.org>
Diffstat (limited to 'tcg/riscv')
| -rw-r--r-- | tcg/riscv/tcg-target.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index f3644a8..a4edc3d 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -109,7 +109,6 @@ extern bool have_zbb; #define TCG_TARGET_HAS_bswap16_i32 have_zbb #define TCG_TARGET_HAS_bswap32_i32 have_zbb #define TCG_TARGET_HAS_not_i32 1 -#define TCG_TARGET_HAS_neg_i32 1 #define TCG_TARGET_HAS_andc_i32 have_zbb #define TCG_TARGET_HAS_orc_i32 have_zbb #define TCG_TARGET_HAS_eqv_i32 have_zbb @@ -142,7 +141,6 @@ extern bool have_zbb; #define TCG_TARGET_HAS_bswap32_i64 have_zbb #define TCG_TARGET_HAS_bswap64_i64 have_zbb #define TCG_TARGET_HAS_not_i64 1 -#define TCG_TARGET_HAS_neg_i64 1 #define TCG_TARGET_HAS_andc_i64 have_zbb #define TCG_TARGET_HAS_orc_i64 have_zbb #define TCG_TARGET_HAS_eqv_i64 have_zbb |