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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 18:07:05 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:23:59 +0100 |
| commit | 9ecf5f61b8f468f17483f325f565802c645983a5 (patch) | |
| tree | 1e7d5ebf403a130c229e5c13d903da018069aac9 /tcg/ppc | |
| parent | 52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571 (diff) | |
| download | qemu-9ecf5f61b8f468f17483f325f565802c645983a5.zip qemu-9ecf5f61b8f468f17483f325f565802c645983a5.tar.gz qemu-9ecf5f61b8f468f17483f325f565802c645983a5.tar.bz2 | |
tcg: Split out tcg_out_ext32u
We will need a backend interface for performing 32-bit zero-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
| -rw-r--r-- | tcg/ppc/tcg-target.c.inc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 0814894..55d4524 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -801,8 +801,9 @@ static void tcg_out_ext32s(TCGContext *s, TCGReg dst, TCGReg src) tcg_out32(s, EXTSW | RA(dst) | RS(src)); } -static inline void tcg_out_ext32u(TCGContext *s, TCGReg dst, TCGReg src) +static void tcg_out_ext32u(TCGContext *s, TCGReg dst, TCGReg src) { + tcg_debug_assert(TCG_TARGET_REG_BITS == 64); tcg_out_rld(s, RLDICL, dst, src, 0, 32); } @@ -3131,6 +3132,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext16u_i32: case INDEX_op_ext16u_i64: case INDEX_op_ext32s_i64: + case INDEX_op_ext32u_i64: default: g_assert_not_reached(); } |