aboutsummaryrefslogtreecommitdiff
path: root/tcg/ppc64
diff options
context:
space:
mode:
authorRichard Henderson <rth@twiddle.net>2013-01-31 08:39:30 -0800
committerRichard Henderson <rth@twiddle.net>2013-04-15 20:09:52 +0200
commit33de9ed2235f8729c36110906c6806b361f96a24 (patch)
tree7e76d9253a09bda2dfd7dc802820818c9599fb54 /tcg/ppc64
parent37251b98db28ff606479f53ff59ec0724348c40b (diff)
downloadqemu-33de9ed2235f8729c36110906c6806b361f96a24.zip
qemu-33de9ed2235f8729c36110906c6806b361f96a24.tar.gz
qemu-33de9ed2235f8729c36110906c6806b361f96a24.tar.bz2
tcg-ppc64: Implement deposit
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ppc64')
-rw-r--r--tcg/ppc64/tcg-target.c12
-rw-r--r--tcg/ppc64/tcg-target.h4
2 files changed, 14 insertions, 2 deletions
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 1cd2153..4405178 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1796,6 +1796,15 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
}
break;
+ case INDEX_op_deposit_i32:
+ tcg_out_rlw(s, RLWIMI, args[0], args[2], args[3],
+ 32 - args[3] - args[4], 31 - args[3]);
+ break;
+ case INDEX_op_deposit_i64:
+ tcg_out_rld(s, RLDIMI, args[0], args[2], args[3],
+ 64 - args[3] - args[4]);
+ break;
+
default:
tcg_dump_ops (s);
tcg_abort ();
@@ -1917,6 +1926,9 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_bswap32_i64, { "r", "r" } },
{ INDEX_op_bswap64_i64, { "r", "r" } },
+ { INDEX_op_deposit_i32, { "r", "0", "r" } },
+ { INDEX_op_deposit_i64, { "r", "0", "r" } },
+
{ -1 },
};
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 6ea4541..7ffa895 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -88,7 +88,7 @@ typedef enum {
#define TCG_TARGET_HAS_eqv_i32 1
#define TCG_TARGET_HAS_nand_i32 1
#define TCG_TARGET_HAS_nor_i32 1
-#define TCG_TARGET_HAS_deposit_i32 0
+#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_movcond_i32 0
#define TCG_TARGET_HAS_add2_i32 0
#define TCG_TARGET_HAS_sub2_i32 0
@@ -110,7 +110,7 @@ typedef enum {
#define TCG_TARGET_HAS_eqv_i64 1
#define TCG_TARGET_HAS_nand_i64 1
#define TCG_TARGET_HAS_nor_i64 1
-#define TCG_TARGET_HAS_deposit_i64 0
+#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_movcond_i64 0
#define TCG_TARGET_HAS_add2_i64 0
#define TCG_TARGET_HAS_sub2_i64 0