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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2022-10-26 01:54:46 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-13 09:32:32 +0100 |
| commit | 1953dfa80e0fc44a8ccfc97b4ada941e9383bba7 (patch) | |
| tree | 4a10dfb77a62495b497370efc9a7e3bba6d8c5c1 /tcg/optimize.c | |
| parent | 6dd92ce6c541d331f384b808173b7c97c09c8684 (diff) | |
| download | qemu-1953dfa80e0fc44a8ccfc97b4ada941e9383bba7.zip qemu-1953dfa80e0fc44a8ccfc97b4ada941e9383bba7.tar.gz qemu-1953dfa80e0fc44a8ccfc97b4ada941e9383bba7.tar.bz2 | |
hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader
Linux kernel expects the northbridge & southbridge chipsets
configured by the BIOS firmware. We emulate that by writing
a tiny bootloader code in write_bootloader().
Upon introduction in commit 5c2b87e34d ("PIIX4 support"),
the PIIX4 configuration space included values specific to
the Malta board.
Set the Malta-specific IRQ routing values in the embedded
bootloader, so the next commit can remove the Malta specific
bits from the PIIX4 PCI-ISA bridge and make it generic
(matching the real hardware).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221027204720.33611-3-philmd@linaro.org>
Diffstat (limited to 'tcg/optimize.c')
0 files changed, 0 insertions, 0 deletions