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author | Richard Henderson <rth@twiddle.net> | 2014-04-28 13:30:30 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2014-05-12 11:13:12 -0700 |
commit | eb68a4fa4e04910baac6726c52910a94f02ef483 (patch) | |
tree | c5f16f52c2f2058a82f0f4d3ff7b84f5f01c5125 /tcg/mips | |
parent | 4e9cf8409aa993d4925075ddaf41770d46eb1fb1 (diff) | |
download | qemu-eb68a4fa4e04910baac6726c52910a94f02ef483.zip qemu-eb68a4fa4e04910baac6726c52910a94f02ef483.tar.gz qemu-eb68a4fa4e04910baac6726c52910a94f02ef483.tar.bz2 |
tcg-mips: Split out tcg_out_call
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/mips')
-rw-r--r-- | tcg/mips/tcg-target.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index eaf1745..65acc86 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -153,11 +153,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) ct->ct |= TCG_CT_REG; tcg_regset_set(ct->u.regs, 0xffffffff); break; - case 'C': - ct->ct |= TCG_CT_REG; - tcg_regset_clear(ct->u.regs); - tcg_regset_set_reg(ct->u.regs, TCG_REG_T9); - break; case 'L': /* qemu_ld output arg constraint */ ct->ct |= TCG_CT_REG; tcg_regset_set(ct->u.regs, 0xffffffff); @@ -1252,6 +1247,13 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, #endif } +static void tcg_out_call(TCGContext *s, tcg_insn_unit *target) +{ + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T9, (intptr_t)target); + tcg_out_opc_reg(s, OPC_JALR, TCG_REG_RA, TCG_REG_T9, 0); + tcg_out_nop(s); +} + static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) { @@ -1277,8 +1279,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, s->tb_next_offset[args[0]] = tcg_current_code_size(s); break; case INDEX_op_call: - tcg_out_opc_reg(s, OPC_JALR, TCG_REG_RA, args[0], 0); - tcg_out_nop(s); + assert(const_args[0]); + tcg_out_call(s, (tcg_insn_unit *)(intptr_t)args[0]); break; case INDEX_op_br: tcg_out_brcond(s, TCG_COND_EQ, TCG_REG_ZERO, TCG_REG_ZERO, args[0]); @@ -1546,7 +1548,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, static const TCGTargetOpDef mips_op_defs[] = { { INDEX_op_exit_tb, { } }, { INDEX_op_goto_tb, { } }, - { INDEX_op_call, { "C" } }, + { INDEX_op_call, { "i" } }, { INDEX_op_br, { } }, { INDEX_op_mov_i32, { "r", "r" } }, |