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authorRichard Henderson <richard.henderson@linaro.org>2024-05-27 20:09:16 +0000
committerRichard Henderson <richard.henderson@linaro.org>2024-06-19 10:55:13 -0700
commit840770183f05b7f04123dba2b32360b5ff04bd21 (patch)
treede47d058e9414e9693bf073b4ce74ec2f923a374 /tcg/loongarch64
parent571f64f0bf97108f6e52357ad8e15284ead73cbb (diff)
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tcg/loongarch64: Remove temp_vec from tcg_out_vec_op
Use TCG_VEC_TMP0 directly. Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/loongarch64')
-rw-r--r--tcg/loongarch64/tcg-target.c.inc9
1 files changed, 4 insertions, 5 deletions
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 4ead3be..1d9e0bf 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1834,7 +1834,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
{
TCGType type = vecl + TCG_TYPE_V64;
TCGArg a0, a1, a2, a3;
- TCGReg temp_vec = TCG_VEC_TMP0;
static const LoongArchInsn cmp_vec_insn[16][4] = {
[TCG_COND_EQ] = {OPC_VSEQ_B, OPC_VSEQ_H, OPC_VSEQ_W, OPC_VSEQ_D},
@@ -1976,8 +1975,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
* dupi_vec temp, a2
* cmp_vec a0, a1, temp, cond
*/
- tcg_out_dupi_vec(s, type, vece, temp_vec, a2);
- a2 = temp_vec;
+ tcg_out_dupi_vec(s, type, vece, TCG_VEC_TMP0, a2);
+ a2 = TCG_VEC_TMP0;
}
insn = cmp_vec_insn[cond][vece];
@@ -2046,8 +2045,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_rotlv_vec:
/* rotlv_vec a1, a2 = rotrv_vec a1, -a2 */
- tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], temp_vec, a2));
- a2 = temp_vec;
+ tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], TCG_VEC_TMP0, a2));
+ a2 = TCG_VEC_TMP0;
/* fall through */
case INDEX_op_rotrv_vec:
insn = rotrv_vec_insn[vece];