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author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 18:07:05 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:23:59 +0100 |
commit | 9ecf5f61b8f468f17483f325f565802c645983a5 (patch) | |
tree | 1e7d5ebf403a130c229e5c13d903da018069aac9 /tcg/arm | |
parent | 52bf3398c3a2f51d3eaf8fd30dafcdc0cc7fc571 (diff) | |
download | qemu-9ecf5f61b8f468f17483f325f565802c645983a5.zip qemu-9ecf5f61b8f468f17483f325f565802c645983a5.tar.gz qemu-9ecf5f61b8f468f17483f325f565802c645983a5.tar.bz2 |
tcg: Split out tcg_out_ext32u
We will need a backend interface for performing 32-bit zero-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
-rw-r--r-- | tcg/arm/tcg-target.c.inc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 401769b..5c48b92 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -998,6 +998,11 @@ static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rn) g_assert_not_reached(); } +static void tcg_out_ext32u(TCGContext *s, TCGReg rd, TCGReg rn) +{ + g_assert_not_reached(); +} + static void tcg_out_bswap16(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn, int flags) { |