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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 14:49:59 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:21:19 +0100
commit753e42eada5c790bb3727c262f2e368e81cc788f (patch)
tree854969ea72b1ed34b29709139bafc6a4b9cc656d /tcg/arm
parentd0e66c897f2cdfb0807b76567a17d7811487fac3 (diff)
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tcg: Split out tcg_out_ext16s
We will need a backend interface for performing 16-bit sign-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
-rw-r--r--tcg/arm/tcg-target.c.inc10
1 files changed, 4 insertions, 6 deletions
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index b99f08a..cddf977 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -975,10 +975,10 @@ tcg_out_ext8u_cond(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
tcg_out_dat_imm(s, cond, ARITH_AND, rd, rn, 0xff);
}
-static void tcg_out_ext16s(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
+static void tcg_out_ext16s(TCGContext *s, TCGType t, TCGReg rd, TCGReg rn)
{
/* sxth */
- tcg_out32(s, 0x06bf0070 | (cond << 28) | (rd << 12) | rn);
+ tcg_out32(s, 0x06bf0070 | (COND_AL << 28) | (rd << 12) | rn);
}
static void tcg_out_ext16u(TCGContext *s, ARMCond cond, TCGReg rd, TCGReg rn)
@@ -1541,7 +1541,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
tcg_out_ext8s(s, TCG_TYPE_I32, datalo, TCG_REG_R0);
break;
case MO_SW:
- tcg_out_ext16s(s, COND_AL, datalo, TCG_REG_R0);
+ tcg_out_ext16s(s, TCG_TYPE_I32, datalo, TCG_REG_R0);
break;
default:
tcg_out_mov_reg(s, COND_AL, datalo, TCG_REG_R0);
@@ -2249,9 +2249,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_bswap32(s, COND_AL, args[0], args[1]);
break;
- case INDEX_op_ext16s_i32:
- tcg_out_ext16s(s, COND_AL, args[0], args[1]);
- break;
case INDEX_op_ext16u_i32:
tcg_out_ext16u(s, COND_AL, args[0], args[1]);
break;
@@ -2305,6 +2302,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_goto_tb: /* Always emitted via tcg_out_goto_tb. */
case INDEX_op_ext8s_i32: /* Always emitted via tcg_reg_alloc_op. */
case INDEX_op_ext8u_i32:
+ case INDEX_op_ext16s_i32:
default:
g_assert_not_reached();
}