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author | Richard Henderson <richard.henderson@linaro.org> | 2019-04-15 04:31:23 +0000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2019-05-13 22:52:08 +0000 |
commit | 79525dfd08262d8de10d271f17e5a4096ef96d16 (patch) | |
tree | 738989f3730d5dfff8f87e48fd2f1eb688ebded1 /tcg/aarch64/tcg-target.opc.h | |
parent | a2ce146a06807fe1d1a81e878b8f249ff1e14038 (diff) | |
download | qemu-79525dfd08262d8de10d271f17e5a4096ef96d16.zip qemu-79525dfd08262d8de10d271f17e5a4096ef96d16.tar.gz qemu-79525dfd08262d8de10d271f17e5a4096ef96d16.tar.bz2 |
tcg/aarch64: Support vector variable shift opcodes
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.opc.h')
-rw-r--r-- | tcg/aarch64/tcg-target.opc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tcg/aarch64/tcg-target.opc.h b/tcg/aarch64/tcg-target.opc.h index 4816a6c..59e1d3f 100644 --- a/tcg/aarch64/tcg-target.opc.h +++ b/tcg/aarch64/tcg-target.opc.h @@ -1,3 +1,5 @@ /* Target-specific opcodes for host vector expansion. These will be emitted by tcg_expand_vec_op. For those familiar with GCC internals, consider these to be UNSPEC with names. */ + +DEF(aa64_sshl_vec, 1, 2, 0, IMPLVEC) |