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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-08-05 14:27:12 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-08-24 11:22:42 -0700 |
| commit | f58a7dea0f0652779e1525f072ef45bf99dbfd72 (patch) | |
| tree | 666180949b9b941dd6318beb4945470a7453e570 /tcg/aarch64/tcg-target.c.inc | |
| parent | 72fa954a6321734b2d7875af7741e23e84601a5b (diff) | |
| download | qemu-f58a7dea0f0652779e1525f072ef45bf99dbfd72.zip qemu-f58a7dea0f0652779e1525f072ef45bf99dbfd72.tar.gz qemu-f58a7dea0f0652779e1525f072ef45bf99dbfd72.tar.bz2 | |
tcg/aarch64: Implement negsetcond_*
Trivial, as aarch64 has an instruction for this: CSETM.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.c.inc')
| -rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 35ca80c..7d8d114 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -2262,6 +2262,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCG_REG_XZR, tcg_invert_cond(args[3])); break; + case INDEX_op_negsetcond_i32: + a2 = (int32_t)a2; + /* FALLTHRU */ + case INDEX_op_negsetcond_i64: + tcg_out_cmp(s, ext, a1, a2, c2); + /* Use CSETM alias of CSINV Wd, WZR, WZR, invert(cond). */ + tcg_out_insn(s, 3506, CSINV, ext, a0, TCG_REG_XZR, + TCG_REG_XZR, tcg_invert_cond(args[3])); + break; + case INDEX_op_movcond_i32: a2 = (int32_t)a2; /* FALLTHRU */ @@ -2868,6 +2878,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_sub_i64: case INDEX_op_setcond_i32: case INDEX_op_setcond_i64: + case INDEX_op_negsetcond_i32: + case INDEX_op_negsetcond_i64: return C_O1_I2(r, r, rA); case INDEX_op_mul_i32: |