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author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 18:56:28 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:46:45 +0100 |
commit | b9bfe000f954e1defefb4c917f98bf82c337144b (patch) | |
tree | 681e36737e9a936a5c9a3213aa57c91b44478153 /tcg/aarch64/tcg-target.c.inc | |
parent | 9c6aa274a494ce807e998a3652fa16a3d2da4387 (diff) | |
download | qemu-b9bfe000f954e1defefb4c917f98bf82c337144b.zip qemu-b9bfe000f954e1defefb4c917f98bf82c337144b.tar.gz qemu-b9bfe000f954e1defefb4c917f98bf82c337144b.tar.bz2 |
tcg: Split out tcg_out_extu_i32_i64
We will need a backend interface for type extension with zero.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.c.inc')
-rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 58596ea..ca8b258 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1462,6 +1462,11 @@ static void tcg_out_ext32u(TCGContext *s, TCGReg rd, TCGReg rn) tcg_out_movr(s, TCG_TYPE_I32, rd, rn); } +static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg rd, TCGReg rn) +{ + tcg_out_ext32u(s, rd, rn); +} + static void tcg_out_addsubi(TCGContext *s, int ext, TCGReg rd, TCGReg rn, int64_t aimm) { @@ -2265,10 +2270,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, } break; - case INDEX_op_extu_i32_i64: - tcg_out_ext32u(s, a0, a1); - break; - case INDEX_op_deposit_i64: case INDEX_op_deposit_i32: tcg_out_dep(s, ext, a0, REG0(2), args[3], args[4]); @@ -2335,6 +2336,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: case INDEX_op_ext_i32_i64: + case INDEX_op_extu_i32_i64: default: g_assert_not_reached(); } |