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author | Richard Henderson <richard.henderson@linaro.org> | 2023-03-23 01:48:06 +0000 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-16 20:13:51 -0700 |
commit | 52533157568c1b8df04821759bdcf24b29a25b83 (patch) | |
tree | c93f049c6c4d17a5dc6a35e3547f9b44b83e421f /tcg/aarch64/tcg-target.c.inc | |
parent | 03a2ecdab17e8410483e7c41af7386ccfce4dd6e (diff) | |
download | qemu-52533157568c1b8df04821759bdcf24b29a25b83.zip qemu-52533157568c1b8df04821759bdcf24b29a25b83.tar.gz qemu-52533157568c1b8df04821759bdcf24b29a25b83.tar.bz2 |
tcg/aarch64: Remove USE_GUEST_BASE
Eliminate the test vs TARGET_LONG_BITS by considering this
predicate to be always true, and simplify accordingly.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target.c.inc')
-rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index a1c9116..ba0748a 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -84,11 +84,6 @@ bool have_lse2; #define TCG_VEC_TMP TCG_REG_V31 #ifndef CONFIG_SOFTMMU -/* Note that XZR cannot be encoded in the address base register slot, - as that actaully encodes SP. So if we need to zero-extend the guest - address, via the address index register slot, we need to load even - a zero guest base into a register. */ -#define USE_GUEST_BASE (guest_base != 0 || TARGET_LONG_BITS == 32) #define TCG_REG_GUEST_BASE TCG_REG_X28 #endif @@ -1738,7 +1733,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h, tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0); } - if (USE_GUEST_BASE) { + if (guest_base || addr_type == TCG_TYPE_I32) { h->base = TCG_REG_GUEST_BASE; h->index = addr_reg; h->index_ext = addr_type; @@ -2993,10 +2988,14 @@ static void tcg_target_qemu_prologue(TCGContext *s) CPU_TEMP_BUF_NLONGS * sizeof(long)); #if !defined(CONFIG_SOFTMMU) - if (USE_GUEST_BASE) { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE); - } + /* + * Note that XZR cannot be encoded in the address base register slot, + * as that actaully encodes SP. Depending on the guest, we may need + * to zero-extend the guest address via the address index register slot, + * therefore we need to load even a zero guest base into a register. + */ + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base); + tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE); #endif tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); |