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author | Richard Henderson <richard.henderson@linaro.org> | 2020-10-15 19:47:04 +0000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-02-02 12:12:31 -1000 |
commit | abc730e18e34ca6282f412f1a20410b76f2d74b7 (patch) | |
tree | e8083db1d0ffa316c60fcb8c4a8a257f32f33cb8 /tcg/aarch64/tcg-target-con-str.h | |
parent | 3440d583d64dedf82e2774b266bcae46253d6b06 (diff) | |
download | qemu-abc730e18e34ca6282f412f1a20410b76f2d74b7.zip qemu-abc730e18e34ca6282f412f1a20410b76f2d74b7.tar.gz qemu-abc730e18e34ca6282f412f1a20410b76f2d74b7.tar.bz2 |
tcg/aarch64: Split out target constraints to tcg-target-con-str.h
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64/tcg-target-con-str.h')
-rw-r--r-- | tcg/aarch64/tcg-target-con-str.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/tcg/aarch64/tcg-target-con-str.h b/tcg/aarch64/tcg-target-con-str.h new file mode 100644 index 0000000..00adb64 --- /dev/null +++ b/tcg/aarch64/tcg-target-con-str.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Define AArch64 target-specific operand constraints. + * Copyright (c) 2021 Linaro + */ + +/* + * Define constraint letters for register sets: + * REGS(letter, register_mask) + */ +REGS('r', ALL_GENERAL_REGS) +REGS('l', ALL_QLDST_REGS) +REGS('w', ALL_VECTOR_REGS) + +/* + * Define constraint letters for constants: + * CONST(letter, TCG_CT_CONST_* bit set) + */ +CONST('A', TCG_CT_CONST_AIMM) +CONST('L', TCG_CT_CONST_LIMM) +CONST('M', TCG_CT_CONST_MONE) +CONST('O', TCG_CT_CONST_ORRI) +CONST('N', TCG_CT_CONST_ANDI) +CONST('Z', TCG_CT_CONST_ZERO) |