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authorIlya Leoshkevich <iii@linux.ibm.com>2021-04-16 17:49:38 +0200
committerCornelia Huck <cohuck@redhat.com>2021-05-20 14:19:30 +0200
commitf689befde664f917510e842660a69961faf8ba7b (patch)
tree071f6b1e6ae26dd6b756bf7c4ba7e95576d6564c /target/xtensa/translate.c
parent48a130923c59b706e7f33527490028eb8a86b97e (diff)
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target/xtensa: Make sure that tb->size != 0
tb_gen_code() assumes that tb->size must never be zero, otherwise it may produce spurious exceptions. For xtensa this may happen when decoding an unknown instruction, when handling a write into the CCOUNT or CCOMPARE special register and when single-stepping the first instruction of an exception handler. Fix by pretending that the size of the respective translation block is 1 in all these cases. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20210416154939.32404-4-iii@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target/xtensa/translate.c')
-rw-r--r--target/xtensa/translate.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 0ae4efc..73584d9d 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -917,6 +917,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
"unknown instruction length (pc = %08x)\n",
dc->pc);
gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
+ dc->base.pc_next = dc->pc + 1;
return;
}
@@ -1274,11 +1275,13 @@ static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
if ((tb_cflags(dc->base.tb) & CF_USE_ICOUNT)
&& (dc->base.tb->flags & XTENSA_TBFLAG_YIELD)) {
gen_exception(dc, EXCP_YIELD);
+ dc->base.pc_next = dc->pc + 1;
dc->base.is_jmp = DISAS_NORETURN;
return;
}
if (dc->base.tb->flags & XTENSA_TBFLAG_EXCEPTION) {
gen_exception(dc, EXCP_DEBUG);
+ dc->base.pc_next = dc->pc + 1;
dc->base.is_jmp = DISAS_NORETURN;
return;
}