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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2023-09-25 14:56:57 -0300
committerAlistair Francis <alistair.francis@wdc.com>2023-10-12 12:02:17 +1000
commitec34cd732ce33af59a913444320f870c6309de51 (patch)
tree3e6b68382642b6133150e22d422b9dfd34f370a0 /target/riscv
parenta7e87cd7bfd4580bc745cf12440f4e26329bc747 (diff)
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target/riscv/cpu.c: mark extensions arrays as 'const'
We'll need to export these arrays to the accelerator classes in the next patches. Mark them as 'const' now because they should not be modified at runtime. Note that 'riscv_cpu_options' will also be exported, but can't be marked as 'const', because the properties are changed via qdev_property_add_static(). Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20230925175709.35696-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/cpu.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d78f73a..d831dc3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1403,7 +1403,7 @@ typedef struct RISCVCPUMultiExtConfig {
{.name = _name, .offset = CPU_CFG_OFFSET(_prop), \
.enabled = _defval}
-static RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
+static const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
/* Defaults for standard extensions */
MULTI_EXT_CFG_BOOL("sscofpmf", ext_sscofpmf, false),
MULTI_EXT_CFG_BOOL("Zifencei", ext_ifencei, true),
@@ -1465,7 +1465,7 @@ static RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = {
+static const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = {
MULTI_EXT_CFG_BOOL("xtheadba", ext_xtheadba, false),
MULTI_EXT_CFG_BOOL("xtheadbb", ext_xtheadbb, false),
MULTI_EXT_CFG_BOOL("xtheadbs", ext_xtheadbs, false),
@@ -1483,7 +1483,7 @@ static RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = {
};
/* These are experimental so mark with 'x-' */
-static RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = {
+static const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = {
/* ePMP 0.9.3 */
MULTI_EXT_CFG_BOOL("x-epmp", epmp, false),
MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false),
@@ -1554,7 +1554,7 @@ static void cpu_get_multi_ext_cfg(Object *obj, Visitor *v, const char *name,
}
static void cpu_add_multi_ext_prop(Object *cpu_obj,
- RISCVCPUMultiExtConfig *multi_cfg)
+ const RISCVCPUMultiExtConfig *multi_cfg)
{
object_property_add(cpu_obj, multi_cfg->name, "bool",
cpu_get_multi_ext_cfg,
@@ -1571,11 +1571,13 @@ static void cpu_add_multi_ext_prop(Object *cpu_obj,
}
static void riscv_cpu_add_multiext_prop_array(Object *obj,
- RISCVCPUMultiExtConfig *array)
+ const RISCVCPUMultiExtConfig *array)
{
+ const RISCVCPUMultiExtConfig *prop;
+
g_assert(array);
- for (RISCVCPUMultiExtConfig *prop = array; prop && prop->name; prop++) {
+ for (prop = array; prop && prop->name; prop++) {
cpu_add_multi_ext_prop(obj, prop);
}
}
@@ -1616,11 +1618,13 @@ static void riscv_cpu_add_kvm_unavail_prop(Object *obj, const char *prop_name)
}
static void riscv_cpu_add_kvm_unavail_prop_array(Object *obj,
- RISCVCPUMultiExtConfig *array)
+ const RISCVCPUMultiExtConfig *array)
{
+ const RISCVCPUMultiExtConfig *prop;
+
g_assert(array);
- for (RISCVCPUMultiExtConfig *prop = array; prop && prop->name; prop++) {
+ for (prop = array; prop && prop->name; prop++) {
riscv_cpu_add_kvm_unavail_prop(obj, prop->name);
}
}
@@ -1683,7 +1687,7 @@ static void riscv_init_max_cpu_extensions(Object *obj)
{
RISCVCPU *cpu = RISCV_CPU(obj);
CPURISCVState *env = &cpu->env;
- RISCVCPUMultiExtConfig *prop;
+ const RISCVCPUMultiExtConfig *prop;
/* Enable RVG, RVJ and RVV that are disabled by default */
set_misa(env, env->misa_mxl, env->misa_ext | RVG | RVJ | RVV);