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| author | LIU Zhiwei <zhiwei_liu@c-sky.com> | 2022-02-01 14:46:01 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-02-16 12:24:18 +1000 |
| commit | ac6bcf4d467a091b11ece782f4bf0a41e0f59cef (patch) | |
| tree | fd452ecad7a969b35b0de6b508ba09fa887318ac /target/riscv | |
| parent | 34888f01b7a905bbbddf1fc8f41691f43b94fcd6 (diff) | |
| download | qemu-ac6bcf4d467a091b11ece782f4bf0a41e0f59cef.zip qemu-ac6bcf4d467a091b11ece782f4bf0a41e0f59cef.tar.gz qemu-ac6bcf4d467a091b11ece782f4bf0a41e0f59cef.tar.bz2 | |
target/riscv: Fix vill field write in vtype
The guest should be able to set the vill bit as part of vsetvl.
Currently we may set env->vill to 1 in the vsetvl helper, but there
is nowhere that we set it to 0, so once it transitions to 1 it's stuck
there until the system is reset.
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220201064601.41143-1-zhiwei_liu@c-sky.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/vector_helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 020d2e8..3bd4aac 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -71,6 +71,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1, env->vl = vl; env->vtype = s2; env->vstart = 0; + env->vill = 0; return vl; } |