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| author | Atish Patra <atishp@rivosinc.com> | 2022-03-03 10:54:35 -0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-04-22 10:35:16 +1000 |
| commit | a46d410c5c19fa752d0ba03333e70170b8a6f57a (patch) | |
| tree | d17504429e183b8b3ff5f5a304b771fd3bf42630 /target/riscv | |
| parent | 9972479faccfe5a4c1e62252c0c70e9daa2f8f1a (diff) | |
| download | qemu-a46d410c5c19fa752d0ba03333e70170b8a6f57a.zip qemu-a46d410c5c19fa752d0ba03333e70170b8a6f57a.tar.gz qemu-a46d410c5c19fa752d0ba03333e70170b8a6f57a.tar.bz2 | |
target/riscv: Define simpler privileged spec version numbering
Currently, the privileged specification version are defined in
a complex manner for no benefit.
Simplify it by changing it to a simple enum based on.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Message-Id: <20220303185440.512391-2-atishp@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/cpu.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 72f1c94..345ec2c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -82,8 +82,11 @@ enum { RISCV_FEATURE_AIA }; -#define PRIV_VERSION_1_10_0 0x00011000 -#define PRIV_VERSION_1_11_0 0x00011100 +/* Privileged specification version */ +enum { + PRIV_VERSION_1_10_0 = 0, + PRIV_VERSION_1_11_0, +}; #define VEXT_VERSION_1_00_0 0x00010000 |