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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-04-01 10:11:49 +0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-05-24 12:09:22 -0700 |
| commit | 81770255581bd210c57b86a6e808628ab8d0c543 (patch) | |
| tree | 0b80a9dbf7bf1dccf3905c76b1f9bb66023e8fc9 /target/riscv | |
| parent | e761799796ac2211b9706753c459e117e7be58fa (diff) | |
| download | qemu-81770255581bd210c57b86a6e808628ab8d0c543.zip qemu-81770255581bd210c57b86a6e808628ab8d0c543.tar.gz qemu-81770255581bd210c57b86a6e808628ab8d0c543.tar.bz2 | |
target/riscv: Use --static-decode for decodetree
The generated functions are only used within translate.c
and do not need to be global, or declared.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv')
| -rw-r--r-- | target/riscv/Makefile.objs | 8 | ||||
| -rw-r--r-- | target/riscv/translate.c | 3 |
2 files changed, 4 insertions, 7 deletions
diff --git a/target/riscv/Makefile.objs b/target/riscv/Makefile.objs index 9c6c109..c7a1b06 100644 --- a/target/riscv/Makefile.objs +++ b/target/riscv/Makefile.objs @@ -7,14 +7,14 @@ decode32-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn32-64.decode target/riscv/decode_insn32.inc.c: $(decode32-y) $(DECODETREE) $(call quiet-command, \ - $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn32 $(decode32-y), \ - "GEN", $(TARGET_DIR)$@) + $(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn32 \ + $(decode32-y), "GEN", $(TARGET_DIR)$@) target/riscv/decode_insn16.inc.c: \ $(SRC_PATH)/target/riscv/insn16.decode $(DECODETREE) $(call quiet-command, \ - $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn16 --insnwidth 16 $<, \ - "GEN", $(TARGET_DIR)$@) + $(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn16 \ + --insnwidth 16 $<, "GEN", $(TARGET_DIR)$@) target/riscv/translate.o: target/riscv/decode_insn32.inc.c \ target/riscv/decode_insn16.inc.c diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 9283742..b091581 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -558,7 +558,6 @@ static int ex_rvc_register(DisasContext *ctx, int reg) return 8 + reg; } -bool decode_insn32(DisasContext *ctx, uint32_t insn); /* Include the auto-generated decoder for 32 bit insn */ #include "decode_insn32.inc.c" @@ -701,8 +700,6 @@ static bool gen_shift(DisasContext *ctx, arg_r *a, # endif #endif -bool decode_insn16(DisasContext *ctx, uint16_t insn); -/* auto-generated decoder*/ #include "decode_insn16.inc.c" #include "insn_trans/trans_rvc.inc.c" |