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authorRichard Henderson <richard.henderson@linaro.org>2021-10-19 20:17:00 -0700
committerAlistair Francis <alistair@alistair23.me>2021-10-22 07:47:51 +1000
commitfbb48032e46976cfc94a90a4233a2060fdc36a4e (patch)
treed44b4d283a0f630fcb8a7e590771089a196f2402 /target/riscv
parent92371bd9033e5a50a7541d96ff8ad067930a4f93 (diff)
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target/riscv: Use REQUIRE_64BIT in amo_check64
Use the same REQUIRE_64BIT check that we use elsewhere, rather than open-coding the use of is_32bit. Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20211020031709.359469-7-richard.henderson@linaro.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv')
-rw-r--r--target/riscv/insn_trans/trans_rvv.c.inc3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
index 45be491..233131b 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -743,7 +743,8 @@ static bool amo_check(DisasContext *s, arg_rwdvm* a)
static bool amo_check64(DisasContext *s, arg_rwdvm* a)
{
- return !is_32bit(s) && amo_check(s, a);
+ REQUIRE_64BIT(s);
+ return amo_check(s, a);
}
GEN_VEXT_TRANS(vamoswapw_v, 0, rwdvm, amo_op, amo_check)