aboutsummaryrefslogtreecommitdiff
path: root/target/riscv/machine.c
diff options
context:
space:
mode:
authorLIU Zhiwei <zhiwei_liu@linux.alibaba.com>2022-10-13 14:29:46 +0800
committerAlistair Francis <alistair.francis@wdc.com>2023-01-06 10:42:55 +1000
commit577f02869488f49955645dd48961cc5593fff63f (patch)
treea2ea4b9a495388da209495d459a9ac87abc702c9 /target/riscv/machine.c
parent91809598a055413d87c10799479086d487558b4e (diff)
downloadqemu-577f02869488f49955645dd48961cc5593fff63f.zip
qemu-577f02869488f49955645dd48961cc5593fff63f.tar.gz
qemu-577f02869488f49955645dd48961cc5593fff63f.tar.bz2
target/riscv: Add itrigger_enabled field to CPURISCVState
Avoid calling riscv_itrigger_enabled() when calculate the tbflags. As the itrigger enable status can only be changed when write tdata1, migration load or itrigger fire, update env->itrigger_enabled at these places. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221013062946.7530-5-zhiwei_liu@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/machine.c')
-rw-r--r--target/riscv/machine.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index e687f9f..65a8549 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -21,6 +21,8 @@
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
#include "migration/cpu.h"
+#include "sysemu/cpu-timers.h"
+#include "debug.h"
static bool pmp_needed(void *opaque)
{
@@ -229,11 +231,24 @@ static bool debug_needed(void *opaque)
return riscv_feature(env, RISCV_FEATURE_DEBUG);
}
+static int debug_post_load(void *opaque, int version_id)
+{
+ RISCVCPU *cpu = opaque;
+ CPURISCVState *env = &cpu->env;
+
+ if (icount_enabled()) {
+ env->itrigger_enabled = riscv_itrigger_enabled(env);
+ }
+
+ return 0;
+}
+
static const VMStateDescription vmstate_debug = {
.name = "cpu/debug",
.version_id = 2,
.minimum_version_id = 2,
.needed = debug_needed,
+ .post_load = debug_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINTTL(env.trigger_cur, RISCVCPU),
VMSTATE_UINTTL_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS),