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| author | Deepak Gupta <debug@rivosinc.com> | 2024-10-08 15:50:00 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-30 11:22:08 +1000 |
| commit | cf064a671a67379c80e4a50a020cbe163f9875c9 (patch) | |
| tree | 6fff1bcffb297e95995972838df1cabb0162b3f6 /target/riscv/cpu_cfg.h | |
| parent | ff81343e7430fe21f9e7e6132f5627a831e3557b (diff) | |
| download | qemu-cf064a671a67379c80e4a50a020cbe163f9875c9.zip qemu-cf064a671a67379c80e4a50a020cbe163f9875c9.tar.gz qemu-cf064a671a67379c80e4a50a020cbe163f9875c9.tar.bz2 | |
target/riscv: Add zicfiss extension
zicfiss [1] riscv cpu extension enables backward control flow integrity.
This patch sets up space for zicfiss extension in cpuconfig. And imple-
ments dependency on A, zicsr, zimop and zcmop extensions.
[1] - https://github.com/riscv/riscv-cfi
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Co-developed-by: Jim Shu <jim.shu@sifive.com>
Co-developed-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241008225010.1861630-11-debug@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu_cfg.h')
| -rw-r--r-- | target/riscv/cpu_cfg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index fe7ad85..59d6fc4 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -68,6 +68,7 @@ struct RISCVCPUConfig { bool ext_zicbop; bool ext_zicboz; bool ext_zicfilp; + bool ext_zicfiss; bool ext_zicond; bool ext_zihintntl; bool ext_zihintpause; |