diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-08-15 15:16:06 -0500 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-10-04 12:13:12 -0700 |
| commit | fbf59aad178d98afe193fa872a2d880266a75269 (patch) | |
| tree | 05d5fb4a7118f1a70eb0a09a1269f859f822502e /target/riscv/cpu.c | |
| parent | e4fdf9df5b1c2aa427de796bea973520027ddd15 (diff) | |
| download | qemu-fbf59aad178d98afe193fa872a2d880266a75269.zip qemu-fbf59aad178d98afe193fa872a2d880266a75269.tar.gz qemu-fbf59aad178d98afe193fa872a2d880266a75269.tar.bz2 | |
accel/tcg: Introduce tb_pc and log_pc
The availability of tb->pc will shortly be conditional.
Introduce accessor functions to minimize ifdefs.
Pass around a known pc to places like tcg_gen_code,
where the caller must already have the value.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv/cpu.c')
| -rw-r--r-- | target/riscv/cpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 6ca05c6..e6d9c70 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -482,9 +482,9 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, RISCVMXL xl = FIELD_EX32(tb->flags, TB_FLAGS, XL); if (xl == MXL_RV32) { - env->pc = (int32_t)tb->pc; + env->pc = (int32_t)tb_pc(tb); } else { - env->pc = tb->pc; + env->pc = tb_pc(tb); } } |