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| author | Anup Patel <anup.patel@wdc.com> | 2022-02-04 23:16:45 +0530 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-02-16 12:24:19 +1000 |
| commit | 43dc93af36dced9d23911be2ed6b0fe82bf3c42c (patch) | |
| tree | d6289524abeeb0bdb4240ba83e0f769cdcd3eba3 /target/riscv/Kconfig | |
| parent | 69077dd687a5e388943548b0eb8e3747cc047324 (diff) | |
| download | qemu-43dc93af36dced9d23911be2ed6b0fe82bf3c42c.zip qemu-43dc93af36dced9d23911be2ed6b0fe82bf3c42c.tar.gz qemu-43dc93af36dced9d23911be2ed6b0fe82bf3c42c.tar.bz2 | |
target/riscv: Implement AIA local interrupt priorities
The AIA spec defines programmable 8-bit priority for each local interrupt
at M-level, S-level and VS-level so we extend local interrupt processing
to consider AIA interrupt priorities. The AIA CSRs which help software
configure local interrupt priorities will be added by subsequent patches.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220204174700.534953-10-anup@brainfault.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/Kconfig')
0 files changed, 0 insertions, 0 deletions