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| author | Marc-André Lureau <marcandre.lureau@redhat.com> | 2022-03-23 19:57:18 +0400 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-04-06 10:50:37 +0200 |
| commit | ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec (patch) | |
| tree | e44d5190b97904e26b30b974002dcbfd6fbe5c80 /target/ppc | |
| parent | e03b56863d2bca3e649e81531c1b0299524481ae (diff) | |
| download | qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.zip qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.tar.gz qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.tar.bz2 | |
Replace TARGET_WORDS_BIGENDIAN
Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done
with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1,
and thus should always be defined to prevent misuse.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Suggested-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/cpu_init.c | 2 | ||||
| -rw-r--r-- | target/ppc/gdbstub.c | 4 | ||||
| -rw-r--r-- | target/ppc/mem_helper.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 073fd10..5062d0e 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7150,7 +7150,7 @@ static void ppc_cpu_reset(DeviceState *dev) #if defined(TARGET_PPC64) msr |= (target_ulong)1 << MSR_TM; /* Transactional memory */ #endif -#if !defined(TARGET_WORDS_BIGENDIAN) +#if !TARGET_BIG_ENDIAN msr |= (target_ulong)1 << MSR_LE; /* Little-endian user mode */ if (!((env->msr_mask >> MSR_LE) & 1)) { fprintf(stderr, "Selected CPU does not support little-endian.\n"); diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index 105c2f7..1252429 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -87,9 +87,9 @@ static int ppc_gdb_register_len(int n) /* * We need to present the registers to gdb in the "current" memory * ordering. For user-only mode we get this for free; - * TARGET_WORDS_BIGENDIAN is set to the proper ordering for the + * TARGET_BIG_ENDIAN is set to the proper ordering for the * binary, and cannot be changed. For system mode, - * TARGET_WORDS_BIGENDIAN is always set, and we must check the current + * TARGET_BIG_ENDIAN is always set, and we must check the current * mode of the chip to see if we're running in little-endian. */ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index f1c76a7..c4ff8fd 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -32,7 +32,7 @@ static inline bool needs_byteswap(const CPUPPCState *env) { -#if defined(TARGET_WORDS_BIGENDIAN) +#if TARGET_BIG_ENDIAN return msr_le; #else return !msr_le; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 408ae26..f14f8d7 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -193,7 +193,7 @@ struct DisasContext { /* Return true iff byteswap is needed in a scalar memop */ static inline bool need_byteswap(const DisasContext *ctx) { -#if defined(TARGET_WORDS_BIGENDIAN) +#if TARGET_BIG_ENDIAN return ctx->le_mode; #else return !ctx->le_mode; |