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| author | Luis Pires <luis.pires@eldorado.org.br> | 2021-06-02 09:51:03 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-06-03 18:10:31 +1000 |
| commit | eba3c766fe355a4e593c1ee6944770f80b68acad (patch) | |
| tree | 4e2dda7fdefdf9f7fd00af27e820a1f2cb7b79c8 /target/ppc | |
| parent | 8f0a4b6a9b40e18116a2bb6bbcc00feb8119c792 (diff) | |
| download | qemu-eba3c766fe355a4e593c1ee6944770f80b68acad.zip qemu-eba3c766fe355a4e593c1ee6944770f80b68acad.tar.gz qemu-eba3c766fe355a4e593c1ee6944770f80b68acad.tar.bz2 | |
target/ppc: fix single-step exception regression
Commit 6086c75 (target/ppc: Replace POWERPC_EXCP_BRANCH with
DISAS_NORETURN) broke the generation of exceptions when
CPU_SINGLE_STEP or CPU_BRANCH_STEP were set, due to nip always being
reset to the address of the current instruction.
This fix leaves nip untouched when generating the exception.
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reported-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210602125103.332793-1-luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/translate.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 95e4d9b..f65d1e8 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4320,8 +4320,7 @@ static void gen_lookup_and_goto_ptr(DisasContext *ctx) if (sse & GDBSTUB_SINGLE_STEP) { gen_debug_exception(ctx); } else if (sse & (CPU_SINGLE_STEP | CPU_BRANCH_STEP)) { - uint32_t excp = gen_prep_dbgex(ctx); - gen_exception(ctx, excp); + gen_helper_raise_exception(cpu_env, tcg_constant_i32(gen_prep_dbgex(ctx))); } else { tcg_gen_exit_tb(NULL, 0); } @@ -8672,7 +8671,7 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) } /* else CPU_SINGLE_STEP... */ if (nip <= 0x100 || nip > 0xf00) { - gen_exception(ctx, gen_prep_dbgex(ctx)); + gen_helper_raise_exception(cpu_env, tcg_constant_i32(gen_prep_dbgex(ctx))); return; } } |