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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2019-04-23 12:21:44 +0200
committerRichard Henderson <richard.henderson@linaro.org>2019-05-13 22:52:08 +0000
commitd577dbaac7553767232faabb6a3e291aebd348ae (patch)
treedadb135efb51a19da429d9c8b421123a7eef24f8 /target/ppc
parent73f671f1a2cbf98264c376359449e4e2a21b8853 (diff)
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target/ppc: Use tcg_gen_abs_i32
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20190423102145.14812-2-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/translate/spe-impl.inc.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/target/ppc/translate/spe-impl.inc.c b/target/ppc/translate/spe-impl.inc.c
index 7ab0a29..36b4d56 100644
--- a/target/ppc/translate/spe-impl.inc.c
+++ b/target/ppc/translate/spe-impl.inc.c
@@ -126,19 +126,7 @@ static inline void gen_##name(DisasContext *ctx) \
tcg_temp_free_i32(t0); \
}
-static inline void gen_op_evabs(TCGv_i32 ret, TCGv_i32 arg1)
-{
- TCGLabel *l1 = gen_new_label();
- TCGLabel *l2 = gen_new_label();
-
- tcg_gen_brcondi_i32(TCG_COND_GE, arg1, 0, l1);
- tcg_gen_neg_i32(ret, arg1);
- tcg_gen_br(l2);
- gen_set_label(l1);
- tcg_gen_mov_i32(ret, arg1);
- gen_set_label(l2);
-}
-GEN_SPEOP_ARITH1(evabs, gen_op_evabs);
+GEN_SPEOP_ARITH1(evabs, tcg_gen_abs_i32);
GEN_SPEOP_ARITH1(evneg, tcg_gen_neg_i32);
GEN_SPEOP_ARITH1(evextsb, tcg_gen_ext8s_i32);
GEN_SPEOP_ARITH1(evextsh, tcg_gen_ext16s_i32);