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authorBALATON Zoltan <balaton@eik.bme.hu>2024-05-13 01:27:59 +0200
committerNicholas Piggin <npiggin@gmail.com>2024-05-24 09:43:10 +1000
commit6b9ea7f3452ecf58582392eefae85db24fc6003f (patch)
tree3c03b9129fda5a55c5441d31e537d8884a928778 /target/ppc
parent58b0132553139b481a4b6ea1c597465152381f66 (diff)
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target/ppc: Transform ppc_jumbo_xlate() into ppc_6xx_xlate()
Now that only 6xx cases left in ppc_jumbo_xlate() we can change it to ppc_6xx_xlate() also removing get_physical_address_wtlb(). Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/internal.h5
-rw-r--r--target/ppc/mmu_common.c38
2 files changed, 13 insertions, 30 deletions
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 98b41a9..4a4f9b9 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -262,10 +262,7 @@ typedef struct mmu_ctx_t mmu_ctx_t;
bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
hwaddr *raddrp, int *psizep, int *protp,
int mmu_idx, bool guest_visible);
-int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx,
- target_ulong eaddr,
- MMUAccessType access_type, int type,
- int mmu_idx);
+
/* Software driven TLB helpers */
int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr,
int way, int is_code);
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index ddb014e..961062b 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -1112,22 +1112,6 @@ void dump_mmu(CPUPPCState *env)
}
}
-int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx,
- target_ulong eaddr,
- MMUAccessType access_type, int type,
- int mmu_idx)
-{
- switch (env->mmu_model) {
- case POWERPC_MMU_SOFT_6xx:
- return mmu6xx_get_physical_address(env, ctx, eaddr, access_type, type);
- case POWERPC_MMU_SOFT_4xx:
- return mmu40x_get_physical_address(env, &ctx->raddr, &ctx->prot, eaddr,
- access_type);
- default:
- cpu_abort(env_cpu(env), "Unknown or invalid MMU model\n");
- }
-}
-
static void booke206_update_mas_tlb_miss(CPUPPCState *env, target_ulong address,
MMUAccessType access_type, int mmu_idx)
{
@@ -1326,12 +1310,10 @@ static bool ppc_40x_xlate(PowerPCCPU *cpu, vaddr eaddr,
return false;
}
-/* Perform address translation */
-/* TODO: Split this by mmu_model. */
-static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr,
- MMUAccessType access_type,
- hwaddr *raddrp, int *psizep, int *protp,
- int mmu_idx, bool guest_visible)
+static bool ppc_6xx_xlate(PowerPCCPU *cpu, vaddr eaddr,
+ MMUAccessType access_type,
+ hwaddr *raddrp, int *psizep, int *protp,
+ int mmu_idx, bool guest_visible)
{
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
@@ -1353,8 +1335,10 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr,
type = ACCESS_INT;
}
- ret = get_physical_address_wtlb(env, &ctx, eaddr, access_type,
- type, mmu_idx);
+ ctx.prot = 0;
+ ctx.hash[0] = 0;
+ ctx.hash[1] = 0;
+ ret = mmu6xx_get_physical_address(env, &ctx, eaddr, access_type, type);
if (ret == 0) {
*raddrp = ctx.raddr;
*protp = ctx.prot;
@@ -1498,14 +1482,16 @@ bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
case POWERPC_MMU_SOFT_4xx:
return ppc_40x_xlate(cpu, eaddr, access_type, raddrp,
psizep, protp, mmu_idx, guest_visible);
+ case POWERPC_MMU_SOFT_6xx:
+ return ppc_6xx_xlate(cpu, eaddr, access_type, raddrp,
+ psizep, protp, mmu_idx, guest_visible);
case POWERPC_MMU_REAL:
return ppc_real_mode_xlate(cpu, eaddr, access_type, raddrp, psizep,
protp);
case POWERPC_MMU_MPC8xx:
cpu_abort(env_cpu(&cpu->env), "MPC8xx MMU model is not implemented\n");
default:
- return ppc_jumbo_xlate(cpu, eaddr, access_type, raddrp,
- psizep, protp, mmu_idx, guest_visible);
+ cpu_abort(CPU(cpu), "Unknown or invalid MMU model\n");
}
}