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| author | Nicholas Piggin <npiggin@gmail.com> | 2023-05-27 03:17:38 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-05-24 09:34:39 +1000 |
| commit | 5fa7efe4730586648412f59f13bd370c40f372ff (patch) | |
| tree | 9f339e928dc9e267da139dfcdae429b60b888065 /target/ppc | |
| parent | 1cbcbcb8d6f10d742aa7cf6ad7bc768492e6407e (diff) | |
| download | qemu-5fa7efe4730586648412f59f13bd370c40f372ff.zip qemu-5fa7efe4730586648412f59f13bd370c40f372ff.tar.gz qemu-5fa7efe4730586648412f59f13bd370c40f372ff.tar.bz2 | |
target/ppc: add helper to write per-LPAR SPRs
An SPR can be either per-thread, per-core, or per-LPAR. Per-LPAR means
per-thread or per-core, depending on 1LPAR mode.
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/spr_common.h | 2 | ||||
| -rw-r--r-- | target/ppc/translate.c | 28 |
2 files changed, 30 insertions, 0 deletions
diff --git a/target/ppc/spr_common.h b/target/ppc/spr_common.h index 9e40b3b..85f73b8 100644 --- a/target/ppc/spr_common.h +++ b/target/ppc/spr_common.h @@ -83,6 +83,8 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn); void spr_write_generic(DisasContext *ctx, int sprn, int gprn); void spr_write_generic32(DisasContext *ctx, int sprn, int gprn); void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn); +void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn); +void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCR0(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCR1(DisasContext *ctx, int sprn, int gprn); void spr_write_MMCRA(DisasContext *ctx, int sprn, int gprn); diff --git a/target/ppc/translate.c b/target/ppc/translate.c index fb05047..7b52502 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -473,6 +473,34 @@ void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn) spr_store_dump_spr(sprn); } +void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn) +{ + TCGv t0; + + if (!(ctx->flags & POWERPC_FLAG_SMT)) { + spr_write_generic32(ctx, sprn, gprn); + return; + } + + if (!gen_serialize(ctx)) { + return; + } + + t0 = tcg_temp_new(); + tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); + gen_helper_spr_core_write_generic(tcg_env, tcg_constant_i32(sprn), t0); + spr_store_dump_spr(sprn); +} + +void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn) +{ + if (ctx->flags & POWERPC_FLAG_SMT_1LPAR) { + spr_core_write_generic(ctx, sprn, gprn); + } else { + spr_write_generic(ctx, sprn, gprn); + } +} + static void spr_write_CTRL_ST(DisasContext *ctx, int sprn, int gprn) { /* This does not implement >1 thread */ |