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authorBALATON Zoltan <balaton@eik.bme.hu>2024-02-27 16:08:10 +0100
committerNicholas Piggin <npiggin@gmail.com>2024-03-13 02:47:04 +1000
commit5ca958cf82058643dfc45dd74a066f4911d651bc (patch)
tree9295f42e31dc6cc5f712bd02af206bae4bd06b5d /target/ppc
parent754920c7e6fa5b8b3cf8e1858299e1a2e3b315a8 (diff)
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target/ppc: Clean up ifdefs in excp_helper.c, part 3
Concatenate #if blocks that are ending then beginning on the next line again. Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc')
-rw-r--r--target/ppc/excp_helper.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 148b0c3..a9efda7 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -2553,10 +2553,8 @@ void helper_raise_exception(CPUPPCState *env, uint32_t exception)
{
raise_exception_err_ra(env, exception, 0, 0);
}
-#endif /* CONFIG_TCG */
#ifndef CONFIG_USER_ONLY
-#ifdef CONFIG_TCG
void helper_store_msr(CPUPPCState *env, target_ulong val)
{
uint32_t excp = hreg_store_msr(env, val, 0);
@@ -2661,9 +2659,7 @@ void helper_hrfid(CPUPPCState *env)
{
do_rfi(env, env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]);
}
-#endif /* TARGET_PPC64 */
-#ifdef TARGET_PPC64
void helper_rfebb(CPUPPCState *env, target_ulong s)
{
target_ulong msr = env->msr;
@@ -2763,10 +2759,8 @@ void helper_rfmci(CPUPPCState *env)
/* FIXME: choose CSRR1 or MCSRR1 based on cpu type */
do_rfi(env, env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]);
}
-#endif /* CONFIG_TCG */
-#endif /* !defined(CONFIG_USER_ONLY) */
+#endif /* !CONFIG_USER_ONLY */
-#ifdef CONFIG_TCG
void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
uint32_t flags)
{
@@ -2794,9 +2788,7 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
}
}
#endif /* TARGET_PPC64 */
-#endif /* CONFIG_TCG */
-#ifdef CONFIG_TCG
static uint32_t helper_SIMON_LIKE_32_64(uint32_t x, uint64_t key, uint32_t lane)
{
const uint16_t c = 0xfffc;
@@ -2907,11 +2899,8 @@ HELPER_HASH(HASHST, env->spr[SPR_HASHKEYR], true, NPHIE)
HELPER_HASH(HASHCHK, env->spr[SPR_HASHKEYR], false, NPHIE)
HELPER_HASH(HASHSTP, env->spr[SPR_HASHPKEYR], true, PHIE)
HELPER_HASH(HASHCHKP, env->spr[SPR_HASHPKEYR], false, PHIE)
-#endif /* CONFIG_TCG */
#ifndef CONFIG_USER_ONLY
-#ifdef CONFIG_TCG
-
/* Embedded.Processor Control */
static int dbell2irq(target_ulong rb)
{
@@ -3258,5 +3247,5 @@ bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp)
return false;
}
-#endif /* CONFIG_TCG */
#endif /* !CONFIG_USER_ONLY */
+#endif /* CONFIG_TCG */