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| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2021-12-17 17:57:18 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2021-12-17 17:57:18 +0100 |
| commit | 38d4914c5065e14f0969161274793ded448f067f (patch) | |
| tree | 659c563b2912135db6045d516ee9c9c036fc10ad /target/ppc | |
| parent | c5df1898a147c232f0502cda5dac8df6074070fc (diff) | |
| download | qemu-38d4914c5065e14f0969161274793ded448f067f.zip qemu-38d4914c5065e14f0969161274793ded448f067f.tar.gz qemu-38d4914c5065e14f0969161274793ded448f067f.tar.bz2 | |
target/ppc: fix xscvqpdp register access
This instruction has VRT and VRB fields instead of T/TX and B/BX.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211213120958.24443-4-victor.colombo@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/translate/vsx-impl.c.inc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index e244775..ab5cb21 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -913,8 +913,9 @@ static void gen_xscvqpdp(DisasContext *ctx) return; } opc = tcg_const_i32(ctx->opcode); - xt = gen_vsr_ptr(xT(ctx->opcode)); - xb = gen_vsr_ptr(xB(ctx->opcode)); + + xt = gen_vsr_ptr(rD(ctx->opcode) + 32); + xb = gen_vsr_ptr(rB(ctx->opcode) + 32); gen_helper_xscvqpdp(cpu_env, opc, xt, xb); tcg_temp_free_i32(opc); tcg_temp_free_ptr(xt); |