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author | Nicholas Piggin <npiggin@gmail.com> | 2023-11-22 17:08:45 +1000 |
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committer | Nicholas Piggin <npiggin@gmail.com> | 2024-02-23 23:24:43 +1000 |
commit | 19e81ce51e68d9a1e6a317cd3f3e519757d16dfd (patch) | |
tree | b91ae46be3c427e441eb9bf512948aa6b7799f04 /target/ppc | |
parent | 0c0fc268dfd4dbaf59e59377ca8a390f362256ad (diff) | |
download | qemu-19e81ce51e68d9a1e6a317cd3f3e519757d16dfd.zip qemu-19e81ce51e68d9a1e6a317cd3f3e519757d16dfd.tar.gz qemu-19e81ce51e68d9a1e6a317cd3f3e519757d16dfd.tar.bz2 |
target/ppc: Rename TBL to TB on 64-bit
From the earliest PowerPC ISA, TBR (later SPR) 268 has been called TB
and accessed with mftb instruction. The problem is that TB is the name
of the 64-bit register, and 32-bit implementations can only read the
lower half with one instruction, so 268 has also been called TBL and
it does only read TBL on 32-bit.
Change SPR 268 to be called TB on 64-bit implementations.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc')
-rw-r--r-- | target/ppc/helper_regs.c | 4 | ||||
-rw-r--r-- | target/ppc/ppc-qmp-cmds.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 8324ff2..8f5bd15 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -460,7 +460,11 @@ void register_generic_sprs(PowerPCCPU *cpu) } /* Time base */ +#if defined(TARGET_PPC64) + spr_register(env, SPR_VTBL, "TB", +#else spr_register(env, SPR_VTBL, "TBL", +#endif &spr_read_tbl, SPR_NOACCESS, &spr_read_tbl, SPR_NOACCESS, 0x00000000); diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c index c0c137d..ee0b99f 100644 --- a/target/ppc/ppc-qmp-cmds.c +++ b/target/ppc/ppc-qmp-cmds.c @@ -103,7 +103,11 @@ const MonitorDef monitor_defs[] = { { "xer", 0, &monitor_get_xer }, { "msr", offsetof(CPUPPCState, msr) }, { "tbu", 0, &monitor_get_tbu, }, +#if defined(TARGET_PPC64) + { "tb", 0, &monitor_get_tbl, }, +#else { "tbl", 0, &monitor_get_tbl, }, +#endif { NULL }, }; |