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authorChinmay Rath <rathc@linux.ibm.com>2024-07-09 17:13:39 +0530
committerNicholas Piggin <npiggin@gmail.com>2024-07-26 09:51:33 +1000
commitbf15bf0a1d07913f22e9e82a0b829d45efc69195 (patch)
tree5da348307e288d15ae404fcff3f38b9685fd1e11 /target/ppc/translate
parente77d736d2a069d462b686f2207df06859abb9ace (diff)
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target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc.
Those functions are used to ld/st data to and from Altivec registers, in 64 bits chunks, and are only used in vmx-impl.c.inc file, hence the clean-up movement. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc/translate')
-rw-r--r--target/ppc/translate/vmx-impl.c.inc10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
index 152bcde..a182d2c 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -14,6 +14,16 @@ static inline TCGv_ptr gen_avr_ptr(int reg)
return r;
}
+static inline void get_avr64(TCGv_i64 dst, int regno, bool high)
+{
+ tcg_gen_ld_i64(dst, tcg_env, avr64_offset(regno, high));
+}
+
+static inline void set_avr64(int regno, TCGv_i64 src, bool high)
+{
+ tcg_gen_st_i64(src, tcg_env, avr64_offset(regno, high));
+}
+
static bool trans_LVX(DisasContext *ctx, arg_X *a)
{
TCGv EA;