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authorMatheus Ferst <matheus.ferst@eldorado.org.br>2022-05-17 09:39:22 -0300
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-05-26 17:11:32 -0300
commiteb69a84bb07be94179eb2275cd9d4bed12afc66f (patch)
treea63be40c9e01bc81ea797195bf5944d383b366eb /target/ppc/translate/fp-impl.c.inc
parentf2454bfe73d1ae9e7561fc3c29e0d2729381d27c (diff)
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target/ppc: Use TCG_CALL_NO_RWG_SE in fsel helper
fsel doesn't change FPSCR and CR1 is handled by gen_set_cr1_from_fpscr, so helper_fsel doesn't need the env argument and can be declared with TCG_CALL_NO_RWG_SE. We also take this opportunity to move the insn to decodetree. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220517123929.284511-6-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/translate/fp-impl.c.inc')
-rw-r--r--target/ppc/translate/fp-impl.c.inc30
1 files changed, 28 insertions, 2 deletions
diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
index cfb27bd..f9b58b8 100644
--- a/target/ppc/translate/fp-impl.c.inc
+++ b/target/ppc/translate/fp-impl.c.inc
@@ -222,8 +222,34 @@ static void gen_frsqrtes(DisasContext *ctx)
tcg_temp_free_i64(t1);
}
-/* fsel */
-_GEN_FLOAT_ACB(sel, 0x3F, 0x17, 0, PPC_FLOAT_FSEL);
+static bool trans_FSEL(DisasContext *ctx, arg_A *a)
+{
+ TCGv_i64 t0, t1, t2;
+
+ REQUIRE_INSNS_FLAGS(ctx, FLOAT_FSEL);
+ REQUIRE_FPU(ctx);
+
+ t0 = tcg_temp_new_i64();
+ t1 = tcg_temp_new_i64();
+ t2 = tcg_temp_new_i64();
+
+ get_fpr(t0, a->fra);
+ get_fpr(t1, a->frb);
+ get_fpr(t2, a->frc);
+
+ gen_helper_FSEL(t0, t0, t1, t2);
+ set_fpr(a->frt, t0);
+ if (a->rc) {
+ gen_set_cr1_from_fpscr(ctx);
+ }
+
+ tcg_temp_free_i64(t0);
+ tcg_temp_free_i64(t1);
+ tcg_temp_free_i64(t2);
+
+ return true;
+}
+
/* fsub - fsubs */
GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT);
/* Optional: */