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author | Richard Henderson <richard.henderson@linaro.org> | 2018-06-26 09:19:13 -0700 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2018-07-03 09:56:52 +1000 |
commit | 14db18997eb29b79f6c538c1a3cd27df259f77a6 (patch) | |
tree | 3b97f26e281c19a5350d2eaa99f2360d9048743e /target/ppc/translate.c | |
parent | 4a9b3c5dd30cfd548d447521d4ef1fdba6f0fcf2 (diff) | |
download | qemu-14db18997eb29b79f6c538c1a3cd27df259f77a6.zip qemu-14db18997eb29b79f6c538c1a3cd27df259f77a6.tar.gz qemu-14db18997eb29b79f6c538c1a3cd27df259f77a6.tar.bz2 |
target/ppc: Remove POWERPC_EXCP_STCX
Always use the gen_conditional_store implementation that uses
atomic_cmpxchg. Make sure and clear reserve_addr across most
interrupts crossing the cpu_loop.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate.c')
-rw-r--r-- | target/ppc/translate.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index c7b9d22..03e8c5d 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3201,19 +3201,6 @@ ST_ATOMIC(stwat, DEF_MEMOP(MO_UL), i32, trunc_tl_i32) ST_ATOMIC(stdat, DEF_MEMOP(MO_Q), i64, mov_i64) #endif -#if defined(CONFIG_USER_ONLY) -static void gen_conditional_store(DisasContext *ctx, TCGv EA, - int reg, int memop) -{ - TCGv t0 = tcg_temp_new(); - - tcg_gen_st_tl(EA, cpu_env, offsetof(CPUPPCState, reserve_ea)); - tcg_gen_movi_tl(t0, (MEMOP_GET_SIZE(memop) << 5) | reg); - tcg_gen_st_tl(t0, cpu_env, offsetof(CPUPPCState, reserve_info)); - tcg_temp_free(t0); - gen_exception_err(ctx, POWERPC_EXCP_STCX, 0); -} -#else static void gen_conditional_store(DisasContext *ctx, TCGv EA, int reg, int memop) { @@ -3244,7 +3231,6 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA, gen_set_label(l2); tcg_gen_movi_tl(cpu_reserve, -1); } -#endif #define STCX(name, memop) \ static void gen_##name(DisasContext *ctx) \ |