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| author | Nicholas Piggin <npiggin@gmail.com> | 2022-05-19 23:59:08 +1000 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-05-26 17:11:33 -0300 |
| commit | 03abfd90cfb02aa08f44bbb7141b0aaaf69042ef (patch) | |
| tree | f44f2f70b6db7a1eab45a8ed086c6f5150b36745 /target/ppc/translate.c | |
| parent | fc879703f74851e3e861894a0c4a6902877d0c2c (diff) | |
| download | qemu-03abfd90cfb02aa08f44bbb7141b0aaaf69042ef.zip qemu-03abfd90cfb02aa08f44bbb7141b0aaaf69042ef.tar.gz qemu-03abfd90cfb02aa08f44bbb7141b0aaaf69042ef.tar.bz2 | |
target/ppc: Implement lwsync with weaker memory ordering
This allows an x86 host to no-op lwsyncs, and ppc host can use lwsync
rather than sync.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220519135908.21282-5-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/translate.c')
| -rw-r--r-- | target/ppc/translate.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index eb42f7e..1d6daa4 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4041,8 +4041,13 @@ static void gen_stqcx_(DisasContext *ctx) /* sync */ static void gen_sync(DisasContext *ctx) { + TCGBar bar = TCG_MO_ALL; uint32_t l = (ctx->opcode >> 21) & 3; + if ((l == 1) && (ctx->insns_flags2 & PPC2_MEM_LWSYNC)) { + bar = TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST; + } + /* * We may need to check for a pending TLB flush. * @@ -4054,7 +4059,8 @@ static void gen_sync(DisasContext *ctx) if (((l == 2) || !(ctx->insns_flags & PPC_64B)) && !ctx->pr) { gen_check_tlb_flush(ctx, true); } - tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); + + tcg_gen_mb(bar | TCG_BAR_SC); } /* wait */ |