diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2024-06-18 12:56:53 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-07-26 09:21:06 +1000 |
| commit | 59c921f2297d6e293fde593432acf90d819e4d51 (patch) | |
| tree | 23db2caf9299c9400a8329cb74eceacfd1cb7484 /target/ppc/cpu.h | |
| parent | 50d8cfb949066e4466700e814a0e26719d70a951 (diff) | |
| download | qemu-59c921f2297d6e293fde593432acf90d819e4d51.zip qemu-59c921f2297d6e293fde593432acf90d819e4d51.tar.gz qemu-59c921f2297d6e293fde593432acf90d819e4d51.tar.bz2 | |
ppc: Add has_smt_siblings property to CPUPPCState
The decision to branch out to a slower SMT path in instruction
emulation will become a bit more complicated with the way that
"big-core" topology that will be implemented in subsequent changes.
Hide these details from the wider CPU emulation code with a bool
has_smt_siblings flag that can be set by machine initialisation.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 417b284..321ed2d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1248,6 +1248,7 @@ struct CPUArchState { int access_type; /* For SMT processors */ + bool has_smt_siblings; int core_index; #if !defined(CONFIG_USER_ONLY) @@ -1514,7 +1515,7 @@ struct PowerPCCPUClass { static inline bool ppc_cpu_core_single_threaded(CPUState *cs) { - return cs->nr_threads == 1; + return !POWERPC_CPU(cs)->env.has_smt_siblings; } static inline bool ppc_cpu_lpar_single_threaded(CPUState *cs) |