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| author | Nicholas Piggin <npiggin@gmail.com> | 2023-08-08 13:11:14 +1000 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2023-09-06 11:19:32 +0200 |
| commit | 14192307ef6e63c9a0f3c7fe937e26bee95bc6a9 (patch) | |
| tree | 5d7a00b3ab95fd16528de5a8b0139b50d470f193 /target/ppc/cpu.h | |
| parent | a11e3a1582b8c0d62ae3ef0323526baf2303e44a (diff) | |
| download | qemu-14192307ef6e63c9a0f3c7fe937e26bee95bc6a9.zip qemu-14192307ef6e63c9a0f3c7fe937e26bee95bc6a9.tar.gz qemu-14192307ef6e63c9a0f3c7fe937e26bee95bc6a9.tar.bz2 | |
target/ppc: Implement breakpoint debug facility for v2.07S
ISA v2.07S introduced the breakpoint facility based on the CIABR SPR.
Implement this in TCG.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 6826702..264a915 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1137,6 +1137,7 @@ struct CPUArchState { /* MMU context, only relevant for full system emulation */ #if defined(TARGET_PPC64) ppc_slb_t slb[MAX_SLB_ENTRIES]; /* PowerPC 64 SLB area */ + struct CPUBreakpoint *ciabr_breakpoint; #endif target_ulong sr[32]; /* segment registers */ uint32_t nb_BATs; /* number of BATs */ @@ -1403,6 +1404,8 @@ void ppc_translate_init(void); #if !defined(CONFIG_USER_ONLY) void ppc_store_sdr1(CPUPPCState *env, target_ulong value); void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); +void ppc_update_ciabr(CPUPPCState *env); +void ppc_store_ciabr(CPUPPCState *env, target_ulong value); #endif /* !defined(CONFIG_USER_ONLY) */ void ppc_store_msr(CPUPPCState *env, target_ulong value); |