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| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2021-10-14 19:32:33 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-10-21 11:42:47 +1100 |
| commit | 10de0521889d36633450e35b22f6a45ef856226d (patch) | |
| tree | 2c0c50429931db377dae0ea34edefba8f00b908f /target/ppc/cpu.c | |
| parent | 7974dc5900f7c128232782b0b39ccd40001bdb08 (diff) | |
| download | qemu-10de0521889d36633450e35b22f6a45ef856226d.zip qemu-10de0521889d36633450e35b22f6a45ef856226d.tar.gz qemu-10de0521889d36633450e35b22f6a45ef856226d.tar.bz2 | |
linux-user: Fix XER access in ppc version of elf_core_copy_regs
env->xer doesn't hold some bits of XER, like OV and CA. To write the
complete register in the core dump we should read XER value with
cpu_read_xer.
Reported-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Fixes: da91a00f191f ("target-ppc: Split out SO, OV, CA fields from XER")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211014223234.127012-4-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/cpu.c')
| -rw-r--r-- | target/ppc/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 7ad9bd6..f933d9f 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -27,7 +27,7 @@ #include "helper_regs.h" #include "sysemu/tcg.h" -target_ulong cpu_read_xer(CPUPPCState *env) +target_ulong cpu_read_xer(const CPUPPCState *env) { if (is_isa300(env)) { return env->xer | (env->so << XER_SO) | |