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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-17 12:56:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-11-17 12:56:32 +0000 |
| commit | 7b0263cb14c809d1553b7349d5729750651af7d8 (patch) | |
| tree | 6620b0ffa4bbf687c4d2acfb536b0d37131470f3 /target/openrisc | |
| parent | 019294db68c24d0a3eb9089166caab94217274e1 (diff) | |
| download | qemu-7b0263cb14c809d1553b7349d5729750651af7d8.zip qemu-7b0263cb14c809d1553b7349d5729750651af7d8.tar.gz qemu-7b0263cb14c809d1553b7349d5729750651af7d8.tar.bz2 | |
target/openrisc: Remove dead code attempting to check "is timer disabled"
In the mtspr helper we attempt to check for "is the timer disabled"
with "if (env->ttmr & TIMER_NONE)". This is wrong because TIMER_NONE
is zero and the condition is always false (Coverity complains about
the dead code.)
The correct check would be to test whether the TTMR_M field in the
register is equal to TIMER_NONE instead. However, the
cpu_openrisc_timer_update() function checks whether the timer is
enabled (it looks at cpu->env.is_counting, which is set to 0 via
cpu_openrisc_count_stop() when the TTMR_M field is set to
TIMER_NONE), so there's no need to check for "timer disabled" in the
target/openrisc code. Instead, simply remove the dead code.
Fixes: Coverity CID 1005812
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Stafford Horne <shorne@gmail.com>
Message-id: 20201103114654.18540-1-peter.maydell@linaro.org
Diffstat (limited to 'target/openrisc')
| -rw-r--r-- | target/openrisc/sys_helper.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index d9fe6c5..41390d0 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -176,9 +176,6 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb) case TO_SPR(10, 1): /* TTCR */ cpu_openrisc_count_set(cpu, rb); - if (env->ttmr & TIMER_NONE) { - return; - } cpu_openrisc_timer_update(cpu); break; #endif |