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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2017-09-20 16:49:32 -0300
committerYongbok Kim <yongbok.kim@imgtec.com>2017-09-21 13:25:27 +0100
commitdf4dc10284e1d871db8adb512816a561473ffe3e (patch)
tree4b77161013b5bbb2f6a1beac379a5c8d7056b4ee /target/mips
parent27e38392ca07f97edfb2257b6a1394a04d84e8d5 (diff)
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mips: call cpu_mips_realize_env() from mips_cpu_realizefn()
This changes the order between cpu_mips_realize_env() and cpu_exec_initfn(), but cpu_exec_initfn() don't have anything that depends on cpu_mips_realize_env() being called first. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Igor Mammedov <imammedo@redhat.com> Tested-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/cpu.c3
-rw-r--r--target/mips/translate.c1
2 files changed, 3 insertions, 1 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 68bf423..e3ef835 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -123,6 +123,7 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) {
static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
+ MIPSCPU *cpu = MIPS_CPU(dev);
MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev);
Error *local_err = NULL;
@@ -132,6 +133,8 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
return;
}
+ cpu_mips_realize_env(&cpu->env);
+
cpu_reset(cs);
qemu_init_vcpu(cs);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 5fc7979..94c38e8 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20535,7 +20535,6 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
cpu = MIPS_CPU(object_new(TYPE_MIPS_CPU));
env = &cpu->env;
env->cpu_model = def;
- cpu_mips_realize_env(env);
object_property_set_bool(OBJECT(cpu), true, "realized", NULL);