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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:54 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:54 +0000 |
| commit | a71492f7267490e3cc238fa00662d29a0762fd3a (patch) | |
| tree | 48dfa2bef3dc4d880ca2639bf0577302b54dbc7d /target/mips | |
| parent | 6f759b179fd72a90fed129721dc28e04fa79d7c3 (diff) | |
| download | qemu-a71492f7267490e3cc238fa00662d29a0762fd3a.zip qemu-a71492f7267490e3cc238fa00662d29a0762fd3a.tar.gz qemu-a71492f7267490e3cc238fa00662d29a0762fd3a.tar.bz2 | |
target/mips: Set FloatInfZeroNaNRule explicitly
Set the FloatInfZeroNaNRule explicitly for the MIPS target,
so we can remove the ifdef from pickNaNMulAdd().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-9-peter.maydell@linaro.org
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/fpu_helper.h | 9 | ||||
| -rw-r--r-- | target/mips/msa.c | 4 |
2 files changed, 13 insertions, 0 deletions
diff --git a/target/mips/fpu_helper.h b/target/mips/fpu_helper.h index 7c3c789..be66f2f 100644 --- a/target/mips/fpu_helper.h +++ b/target/mips/fpu_helper.h @@ -28,6 +28,7 @@ static inline void restore_flush_mode(CPUMIPSState *env) static inline void restore_snan_bit_mode(CPUMIPSState *env) { bool nan2008 = env->active_fpu.fcr31 & (1 << FCR31_NAN2008); + FloatInfZeroNaNRule izn_rule; /* * With nan2008, SNaNs are silenced in the usual way. @@ -35,6 +36,14 @@ static inline void restore_snan_bit_mode(CPUMIPSState *env) */ set_snan_bit_is_one(!nan2008, &env->active_fpu.fp_status); set_default_nan_mode(!nan2008, &env->active_fpu.fp_status); + /* + * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan) + * case sets InvalidOp and returns the default NaN. + * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan) + * case sets InvalidOp and returns the input value 'c'. + */ + izn_rule = nan2008 ? float_infzeronan_dnan_never : float_infzeronan_dnan_always; + set_float_infzeronan_rule(izn_rule, &env->active_fpu.fp_status); } static inline void restore_fp_status(CPUMIPSState *env) diff --git a/target/mips/msa.c b/target/mips/msa.c index 9dffc42..cc152db 100644 --- a/target/mips/msa.c +++ b/target/mips/msa.c @@ -74,4 +74,8 @@ void msa_reset(CPUMIPSState *env) /* set proper signanling bit meaning ("1" means "quiet") */ set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); + + /* Inf * 0 + NaN returns the input NaN */ + set_float_infzeronan_rule(float_infzeronan_dnan_never, + &env->active_tc.msa_fp_status); } |