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| author | James Hogan <james.hogan@imgtec.com> | 2017-07-18 12:55:54 +0100 |
|---|---|---|
| committer | Yongbok Kim <yongbok.kim@imgtec.com> | 2017-07-20 22:42:26 +0100 |
| commit | b0fc6003224543d2bdb172eca752656a6223e4a1 (patch) | |
| tree | 174e0757fcf32dd89fe80f47f6e29c38b8d84dd8 /target/mips/translate.c | |
| parent | 9fbf4a58c90183b30bb2c8ad971ccce7e6716a16 (diff) | |
| download | qemu-b0fc6003224543d2bdb172eca752656a6223e4a1.zip qemu-b0fc6003224543d2bdb172eca752656a6223e4a1.tar.gz qemu-b0fc6003224543d2bdb172eca752656a6223e4a1.tar.bz2 | |
target/mips: Abstract mmu_idx from hflags
The MIPS mmu_idx is sometimes calculated from hflags without an env
pointer available as cpu_mmu_index() requires.
Create a common hflags_mmu_index() for the purpose of this calculation
which can operate on any hflags, not just with an env pointer, and
update cpu_mmu_index() itself and gen_intermediate_code() to use it.
Also update debug_post_eret() and helper_mtc0_status() to log the MMU
mode with the status change (SM, UM, or nothing for kernel mode) based
on cpu_mmu_index() rather than directly testing hflags.
This will also allow the logic to be more easily updated when a new MMU
mode is added.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target/mips/translate.c')
| -rw-r--r-- | target/mips/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 9787919..4fb8217 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20157,7 +20157,7 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) #ifdef CONFIG_USER_ONLY ctx.mem_idx = MIPS_HFLAG_UM; #else - ctx.mem_idx = ctx.hflags & MIPS_HFLAG_KSU; + ctx.mem_idx = hflags_mmu_index(ctx.hflags); #endif ctx.default_tcg_memop_mask = (ctx.insn_flags & ISA_MIPS32R6) ? MO_UNALN : MO_ALIGN; |