aboutsummaryrefslogtreecommitdiff
path: root/target/mips/machine.c
diff options
context:
space:
mode:
authorStefan Markovic <smarkovic@wavecomp.com>2018-08-02 16:15:53 +0200
committerAleksandar Markovic <amarkovic@wavecomp.com>2018-08-16 19:18:45 +0200
commit25beba9bf76a677747b779e997c6540677a38311 (patch)
tree6c6b3a9cae1856eb5bf988ed44aa70c2319a95be /target/mips/machine.c
parent0413d7a55a8161ebd33541ba1df4285bf180c583 (diff)
downloadqemu-25beba9bf76a677747b779e997c6540677a38311.zip
qemu-25beba9bf76a677747b779e997c6540677a38311.tar.gz
qemu-25beba9bf76a677747b779e997c6540677a38311.tar.bz2
target/mips: Add CP0 BadInstrX register
Add CP0 BadInstrX register. This register will be used in nanoMIPS. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target/mips/machine.c')
-rw-r--r--target/mips/machine.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/target/mips/machine.c b/target/mips/machine.c
index 20100d5..5ba78ac 100644
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -212,8 +212,8 @@ const VMStateDescription vmstate_tlb = {
const VMStateDescription vmstate_mips_cpu = {
.name = "cpu",
- .version_id = 10,
- .minimum_version_id = 10,
+ .version_id = 11,
+ .minimum_version_id = 11,
.post_load = cpu_post_load,
.fields = (VMStateField[]) {
/* Active TC */
@@ -266,6 +266,7 @@ const VMStateDescription vmstate_mips_cpu = {
VMSTATE_UINTTL(env.CP0_BadVAddr, MIPSCPU),
VMSTATE_UINT32(env.CP0_BadInstr, MIPSCPU),
VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU),
+ VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
VMSTATE_INT32(env.CP0_Count, MIPSCPU),
VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
VMSTATE_INT32(env.CP0_Compare, MIPSCPU),