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authorLaurent Vivier <laurent@vivier.eu>2018-01-18 20:38:40 +0100
committerLaurent Vivier <laurent@vivier.eu>2018-01-25 16:02:24 +0100
commit98670d47cd8d63a529ff230fd39ddaa186156f8c (patch)
treece2092bb342d6350919eb1fbad02dfdd446a4123 /target/mips/helper.c
parent39e3e113bdb27b4144d697fbd6678a9c24740103 (diff)
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accel/tcg: add size paremeter in tlb_fill()
The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
Diffstat (limited to 'target/mips/helper.c')
-rw-r--r--target/mips/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/helper.c b/target/mips/helper.c
index ea07626..8cf91ce 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -535,7 +535,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
}
#endif
-int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
+int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
int mmu_idx)
{
MIPSCPU *cpu = MIPS_CPU(cs);