diff options
| author | Marc-André Lureau <marcandre.lureau@redhat.com> | 2022-03-23 19:57:18 +0400 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-04-06 10:50:37 +0200 |
| commit | ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec (patch) | |
| tree | e44d5190b97904e26b30b974002dcbfd6fbe5c80 /target/mips/cpu.c | |
| parent | e03b56863d2bca3e649e81531c1b0299524481ae (diff) | |
| download | qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.zip qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.tar.gz qemu-ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec.tar.bz2 | |
Replace TARGET_WORDS_BIGENDIAN
Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done
with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1,
and thus should always be defined to prevent misuse.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Suggested-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/mips/cpu.c')
| -rw-r--r-- | target/mips/cpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index af28717..ad74fbe 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -189,7 +189,7 @@ static void mips_cpu_reset(DeviceState *dev) /* Reset registers to their default values */ env->CP0_PRid = env->cpu_model->CP0_PRid; env->CP0_Config0 = env->cpu_model->CP0_Config0; -#ifdef TARGET_WORDS_BIGENDIAN +#if TARGET_BIG_ENDIAN env->CP0_Config0 |= (1 << CP0C0_BE); #endif env->CP0_Config1 = env->cpu_model->CP0_Config1; @@ -418,7 +418,7 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) CPUMIPSState *env = &cpu->env; if (!(env->insn_flags & ISA_NANOMIPS32)) { -#ifdef TARGET_WORDS_BIGENDIAN +#if TARGET_BIG_ENDIAN info->print_insn = print_insn_big_mips; #else info->print_insn = print_insn_little_mips; |