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| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-04-13 16:04:13 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-05-29 09:33:52 +0200 |
| commit | 9e50a927b4e2e724849f6ec19fa55fe40e13d174 (patch) | |
| tree | 387702d843021d9bfcf52b2052b95330fe3b036d /target/microblaze | |
| parent | a17f7c05f07aa3a825f7dc1ba22d70df16098d3c (diff) | |
| download | qemu-9e50a927b4e2e724849f6ec19fa55fe40e13d174.zip qemu-9e50a927b4e2e724849f6ec19fa55fe40e13d174.tar.gz qemu-9e50a927b4e2e724849f6ec19fa55fe40e13d174.tar.bz2 | |
target-microblaze: Conditionalize setting of PVR11_USE_MMU
Conditionalize setting of PVR11_USE_MMU on the use_mmu
CPU property, otherwise we may incorrectly advertise an
MMU via PVR when the core in fact has none.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze')
| -rw-r--r-- | target/microblaze/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 06476f6..a6f1ce6 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -201,7 +201,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) PVR5_DCACHE_WRITEBACK_MASK : 0; env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ - env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); + env->pvr.regs[11] = (cpu->cfg.use_mmu ? PVR11_USE_MMU : 0) | + 16 << 17; mcc->parent_realize(dev, errp); } |