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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-09-14 17:17:38 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-11-02 07:00:52 -0400 |
| commit | fd297732a2c27aae8407a0c96660345af10575df (patch) | |
| tree | e807dd3f26a14c14caa091e70aed2108347c21ec /target/microblaze/cpu.h | |
| parent | 028772c45cfdd21870f0f9056d270f03bf990fae (diff) | |
| download | qemu-fd297732a2c27aae8407a0c96660345af10575df.zip qemu-fd297732a2c27aae8407a0c96660345af10575df.tar.gz qemu-fd297732a2c27aae8407a0c96660345af10575df.tar.bz2 | |
target/microblaze: Make mb_cpu_tlb_fill sysemu only
The fallback code in cpu_loop_exit_sigsegv is sufficient
for microblaze linux-user.
Remove the code from cpu_loop that handled the unnamed 0xaa exception.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/cpu.h')
| -rw-r--r-- | target/microblaze/cpu.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index b7a848b..e9cd0b8 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -394,10 +394,6 @@ void mb_tcg_init(void); #define MMU_USER_IDX 2 /* See NB_MMU_MODES further up the file. */ -bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); - typedef CPUMBState CPUArchState; typedef MicroBlazeCPU ArchCPU; @@ -415,6 +411,10 @@ static inline void cpu_get_tb_cpu_state(CPUMBState *env, target_ulong *pc, } #if !defined(CONFIG_USER_ONLY) +bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); + void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, int mmu_idx, MemTxAttrs attrs, |