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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-08-19 22:33:37 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-09-01 07:41:38 -0700 |
| commit | 3e0e16ae1e0048a21a91674061ec9c43c5d7a76c (patch) | |
| tree | b493bacf05a8a4094393953193dfeba2a0510f1b /target/microblaze/cpu.h | |
| parent | 0f96e96bd5144b1a834fed2b53a17fcf46637dcb (diff) | |
| download | qemu-3e0e16ae1e0048a21a91674061ec9c43c5d7a76c.zip qemu-3e0e16ae1e0048a21a91674061ec9c43c5d7a76c.tar.gz qemu-3e0e16ae1e0048a21a91674061ec9c43c5d7a76c.tar.bz2 | |
target/microblaze: Fix width of MSR
The machine status register is only 32-bits wide.
Do not use a 64-bit type to represent it.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/cpu.h')
| -rw-r--r-- | target/microblaze/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index f4c3c09..019e5df 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -237,7 +237,7 @@ struct CPUMBState { uint32_t imm; uint32_t regs[32]; uint32_t pc; - uint64_t msr; + uint32_t msr; uint64_t ear; uint64_t esr; uint64_t fsr; |