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authorManos Pitsidianakis <manos.pitsidianakis@linaro.org>2024-02-20 10:52:26 +0200
committerMichael Tokarev <mjt@tls.msk.ru>2024-02-21 08:16:58 +0300
commitc2ca6c9ca177753ca76c82fc7ed53926a3172783 (patch)
tree65829133332a514d2045a10c61cad39195c5aaca /target/m68k
parent5c192aa98254f130d3e75cedf5dadfd4b01f4a87 (diff)
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m68k: correct typos
Correct typos automatically found with the `typos` tool <https://crates.io/crates/typos> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> (mjt: trivial fixup "covers" suggested by Thomas) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target/m68k')
-rw-r--r--target/m68k/cpu.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index aca4aa6..646cacb 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -478,10 +478,11 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
* The 68000 family is defined in six main CPU classes, the 680[012346]0.
* Generally each successive CPU adds enhanced data/stack/instructions.
* However, some features are only common to one, or a few classes.
- * The features covers those subsets of instructons.
+ * The features cover those subsets of instructions.
*
- * CPU32/32+ are basically 680010 compatible with some 68020 class instructons,
- * and some additional CPU32 instructions. Mostly Supervisor state differences.
+ * CPU32/32+ are basically 680010 compatible with some 68020 class
+ * instructions, and some additional CPU32 instructions. Mostly Supervisor
+ * state differences.
*
* The ColdFire core ISA is a RISC-style reduction of the 68000 series cpu.
* There are 4 ColdFire core ISA revisions: A, A+, B and C.