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author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-09-25 14:48:04 +0100 |
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committer | Laurent Vivier <laurent@vivier.eu> | 2022-09-26 23:37:22 +0200 |
commit | b342e56b23dc2a0a1f30e21d67d001a1d0befbf0 (patch) | |
tree | 3395f62377c7011cd3791c63824a7db0361d5cc4 /target/m68k | |
parent | 2dc7bf63cf77d23b287c8d78628d62046fba1bf4 (diff) | |
download | qemu-b342e56b23dc2a0a1f30e21d67d001a1d0befbf0.zip qemu-b342e56b23dc2a0a1f30e21d67d001a1d0befbf0.tar.gz qemu-b342e56b23dc2a0a1f30e21d67d001a1d0befbf0.tar.bz2 |
target/m68k: use M68K_FEATURE_MOVEFROMSR_PRIV feature for move_from_sr privilege check
Now that M68K_FEATURE_M68000 has been renamed to M68K_FEATURE_M68K it is easier
to see that the privilege exception check is wrong: it is currently only generated
for ColdFire CPUs when in fact it should also be generated for Motorola CPUs from
the 68010 onwards.
Introduce a new M68K_FEATURE_MOVEFROMSR_PRIV feature which is set for all non-
Motorola CPUs, and for all Motorola CPUs from the 68010 onwards and use it to
determine whether a privilege exception should be generated for the MOVE-from-SR
instruction.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220925134804.139706-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target/m68k')
-rw-r--r-- | target/m68k/cpu.c | 5 | ||||
-rw-r--r-- | target/m68k/cpu.h | 2 | ||||
-rw-r--r-- | target/m68k/translate.c | 2 |
3 files changed, 8 insertions, 1 deletions
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 8d23c72..25d610d 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -102,6 +102,7 @@ static void m5206_cpu_initfn(Object *obj) CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } /* Base feature set, including isns. for m68k family */ @@ -129,6 +130,7 @@ static void m68010_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_RTD); m68k_set_feature(env, M68K_FEATURE_BKPT); m68k_set_feature(env, M68K_FEATURE_MOVEC); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } /* @@ -241,6 +243,7 @@ static void m5208_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void cfv4e_cpu_initfn(Object *obj) @@ -254,6 +257,7 @@ static void cfv4e_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_CF_FPU); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void any_cpu_initfn(Object *obj) @@ -275,6 +279,7 @@ static void any_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index f5c6e95..3a9cfe2 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -537,6 +537,8 @@ enum m68k_features { M68K_FEATURE_UNALIGNED_DATA, /* TRAPcc insn. (680[2346]0, and CPU32) */ M68K_FEATURE_TRAPCC, + /* MOVE from SR privileged (from 68010) */ + M68K_FEATURE_MOVEFROMSR_PRIV, }; static inline bool m68k_feature(CPUM68KState *env, int feature) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 233b9d8..9df17aa 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4624,7 +4624,7 @@ DISAS_INSN(move_from_sr) { TCGv sr; - if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68K)) { + if (IS_USER(s) && m68k_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV)) { gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } |